XCENA Details MX1 Architecture Integrating Memory Expansion and Near-Memory Computing at Hot Chips 2026

PALO ALTO, Calif.--(BUSINESS WIRE)--Aug 25, 2026--

XCENA, a semiconductor company developing memory-centric computing solutions for AI infrastructure, today presented the architecture and measured performance of MX1, its computational CXL memory architecture, during the Hot Chips 2026 Memory session. Presented by Harry Kim, Chief Product Officer of XCENA, the session examined how MX1 combines large-scale memory expansion, SSD-backed capacity and programmable near-memory computing in a single CXL Type 3 device to address the growing memory constraints of AI infrastructure.

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The MX1 presentation was selected through the Hot Chips program committee's technical review process.

As AI models continue to grow, system performance is increasingly constrained by memory capacity, data movement and the economics of high-bandwidth memory scaling rather than compute alone. MX1 is designed to complement CPUs, GPUs and AI accelerators by expanding memory capacity and offloading selected memory-bound operations—including vector search, KV-cache retrieval and data preprocessing—so host processors can focus on compute-intensive inference.

MX1 integrates three architectural capabilities within a single CXL Type 3 device:

“Hot Chips is where the industry evaluates new computing architectures based on technical merit,” said Harry Kim, Chief Product Officer of XCENA. “Our presentation shares the architectural design, software model and measured performance of MX1, demonstrating how computational CXL memory can help address the growing capacity and data-movement challenges facing AI infrastructure.”

Measured performance on representative data-processing workloads

XCENA evaluated MX1 across six representative data-processing kernels commonly found in analytics and AI pipelines: compression, decompression, Parquet decoding, less-than filtering, LIKE filtering and aggregation.

Compared with a host CPU processing data over CXL, a single MX1 delivered up to 4.7x higher throughput and 18.7x greater energy efficiency. Compared with the same host CPU processing data from local DDR5 memory, MX1 delivered up to 2.0x higher throughput and 6.2x greater energy efficiency.¹

“These results demonstrate the value of executing highly parallel, memory-bound workloads closer to where the data resides,” Kim said. “MX1 is designed to complement the host processor by reducing unnecessary data movement, allowing CPU resources to remain focused on operating system services, orchestration and general-purpose computation.”

Software model and availability

Developers program MX1 using standard C/C++ or Rust through XCENA’s LLVM-based software toolchain. The PXL runtime schedules and synchronizes workloads across the device’s RISC-V processing cores while providing a shared virtual address space that simplifies memory management for complex data structures and multi-application execution.

At the framework level, XCENA’s XFLARE analytics library integrates with SQL engines and FAISS-based vector search. The software stack is also being extended to support widely adopted AI and data frameworks, including Apache Arrow, PyTorch and vector databases, with additional SDK integrations planned over time. SDK information is available at xcena.com/sdk.

XCENA plans to begin mass production by the end of 2026, with initial customer revenue targeted for 2027.

About XCENA

XCENA is a memory-centric AI computing company redefining the role of memory in AI infrastructure. Built on the open Compute Express Link (CXL) standard, XCENA develops products that enable memory to be expanded and utilized more efficiently, helping customers improve AI infrastructure performance while reducing latency, power consumption, and total cost of ownership (TCO).

Founded by semiconductor veterans from Samsung Electronics and SK hynix, XCENA combines expertise in semiconductor design with a full-stack software development kit (SDK) to help hyperscalers, cloud providers, and enterprises deploy and optimize AI infrastructure at scale. Headquartered in Seongnam, South Korea, with a U.S. office in Sunnyvale, California, XCENA has raised US$185 million to date, including a US$135 million Series B financing. Learn more at www.xcena.com.

¹ Measured across six data-analytics kernels (compression, decompression, Parquet decoding, less-than filter, LIKE filter and aggregation) comparing a single MX1 with a host CPU pinned to a single NUMA node in three configurations: host with local DDR5, host processing data over CXL and MX1 offload. Throughput = input size ÷ elapsed time. Energy efficiency = throughput ÷ active power above system idle. Results vary by workload and configuration. Full methodology will be included in the Hot Chips 2026 presentation materials.

XCENA Details MX1 Architecture Integrating Memory Expansion and Near-Memory Computing at Hot Chips 2026

XCENA Details MX1 Architecture Integrating Memory Expansion and Near-Memory Computing at Hot Chips 2026

NEW YORK (AP) — New York Giants wide receiver Calvin Austin was carted off the field during a training camp practice Tuesday in East Rutherford, New Jersey, after appearing to injure his right knee.

“I think naturally you always think the worst when something like that happens, but we don’t know,” offensive coordinator Matt Nagy told reporters in attendance. “I’ll just say this about Calvin Austin: What an unbelievable kid, what a great person and a great talent.”

Austin, 27, was having a strong camp and preseason and looked to be on track for at least a prominent role on offense, if not a starting spot. That allowed him to stand out at a crowded position with plenty of uncertainty from Malik Nabers coming off a torn ACL to Odell Beckham Jr. fighting to make the roster.

If he's out, Austin's absence could affect the numbers game at the position, with Beckham and Braxton Berrios among those on the roster bubble.

Austin was in his first camp with the Giants after signing a $1.5 million contract for this season. He had 89 catches for 1,140 yards and nine touchdowns in 51 games, counting the playoffs, over his first three NFL seasons, all with Pittsburgh.

The Giants traded offensive lineman Josh Ezeudu to the Kansas City Chiefs for a seventh-round pick in the 2028 draft, according to a person familiar with the deal. The person spoke to The Associated Press on condition of anonymity Tuesday night because the trade had not been finalized.

It is the second time in the past week New York picked up an asset for a depth lineman. Daniel Faalele was traded to Jacksonville for a sixth-rounder next year, and coach John Harbaugh said the organization was open to similar moves to stockpile draft capital.

“If we could, we’d do it as much as we possibly could,” Harbaugh said. “We’d like to take advantage of the opportunities, if they’ll come up, as much as we can. We do have some guys. We’re kind of deep in a few positions, and maybe that’ll happen. It doesn’t happen that often, but maybe it will.”

See AP’s full NFL coverage here

New York Giants wide receiver Calvin Austin III (82) does drills during a joint NFL football practice, Thursday, Aug. 20, 2026, in Miami Gardens, Fla. (AP Photo/Lynne Sladky)

New York Giants wide receiver Calvin Austin III (82) runs the ball during the first half of a preseason NFL football game against the Miami Dolphins, Saturday, Aug. 22, 2026, in Miami Gardens, Fla. (AP Photo/Doug Murray)

New York Giants wide receiver Calvin Austin III (82) runs the ball during the first half of a preseason NFL football game against the Miami Dolphins, Saturday, Aug. 22, 2026, in Miami Gardens, Fla. (AP Photo/Lynne Sladky)